• Cortex-A53 - GICv4 Documentation
    i have 1 more query related to GIC. in Cortex-A53 it is mentioned that it is using GIC 400 and GIC architecture Version 4, but in ARM site i am not seeing any GIC V4 Doc, there is only GIc v2
  • Cortex M4: Atomic and Cache
    Hello all, Recently I came across this issue for the cortex M4 core. We are running a freertos application which loads and stores the value of a variable. For this we are using the atomic functions...
  • RNG (Random) on Cortex-M4
    Many implementations on Cortex requires true random number generation. It is very common to use seed based on the tick counter and then rand() function which is "just" a constant fixed known function...
  • Unidentified hardfault on Arm Cortex-M4
    I have a whole bunch of hardfault annotations - all of them show CFSR value as 0. I've tested the annotation mechanism with two intentional hardfaults (divide by zero and write through null pointer) and...
  • Cortex M4 - Returning from Interrupt
    Hi, I'm using the STM32 F407 (Cortex M4), and I am also only using assembly in uVision IDE. So far I have managed to setup a ISR for a pushbutton generated interrupt via GPIO. This all works, I get...