• Register 'names' in instruction descriptions
    The registers in the instructions are usually 'named' Rn, Rm, Rd, ... Is there some deeper meaning in the names? Usually Rd seems to mean 'destination register' Sometimes Rn is the only operand, sometimes...
  • Coprocessor instruction differencies?
    Are there differences between coprocessor instructions and instruction2:s? I mean: MCRR vs. MCRR2 MRRC vs. MRRC2 MCR vs. MCR2 MRC vs. MRC2 LDC vs. LDC2 STC vs STC2 I didn't find any differences in the...
  • Detecting Overflow from MUL
    Detecting Overflow from Arithmetic Operations I discussed in a previous blog post that it is possible to set some condition flags based on the result of an arithmetic operation. Consider the following...
  • UNPREDICTABLE in instruction description (Lord! yet another question)
    In quite many instruction descriptions it says: if d == 15 then UNPREDICTABLE; What does this mean? Can the instruction really work in some unexpected way in each such case or what? I guess if I use...
  • question about arm cortex-a9 neon optimization(4x4 matrix mul)
    ======================================= for matrix 4 by 4 multiplication, neon programming is slower than natural code with auto-vectorization option. (Xilinx Zynq 702 EVM board - cortex a9 with gcc complier...