• SMMU related question.
    when reading  ARM® System Memory Management Unit Architecture Specification, I noticed that there is a saying in about chapter 5, the last section named <cache maintenance operations>.           In SMMUv2...
  • Share aarch64 page tables created by Linux with SMMU
    Hello! I am currently working on creating a shared virtual address space in Linux arm64 on a Xilinx Zynq Ultrascale+ board. In the future it should be possible to share pointers/addresses between the...
  • GICv2 initialization for Non-Secure World
    Hi, Recently I am working on porting our Cortex A7 code that used to run in secure world to non-secure world for some reason. I got a problem when it came to GIC initialization. I noticed that in order...
  • Cortex-A7 initialization code & TrustZone/ Secure Boot
    Hi, I just got a raspberry pi 2 and I'd like to play with Trustzone. People on the Raspberry forum http://www.raspberrypi.org/forums/viewtopic.php?p=697474#p697474 explained me how to get my hand on the...
  • How SMMU will override the memory attribute of the master which have MMU/MPU embedded?
    For example, one M4 is a client of SMMU, and its MPU had been configured to map some memory(MEM_A) as inner outter write-back, how the configureation of SMMU context transcation table will affect the...