• Core_n System Timer reset behaviour
    Hello, I'm working with i.MX8DX (Dual Core CortexA35) My question is this: If a PE is reset. Is the CNTPCT_EL0 is also reset and start from 0? or keep counting normally?
  • Synchronization of caches on ARMv8
    Hello, I have a question regarding the synchronization of caches on ARMv8 on Multi-Core. Let's assume that we have 2 cores that are running in parallel, and both has L1 Cache with line size = 64 Bytes...
  • Synchronization Between CortexA and CortexM
    Hello, I'm working with a bare-metal application running on i.MX8 (QuadCore CortexA35 & Single Core CortexM4). Currently, I use Load/Store executive assembly instructions along with memory attributes...
  • System Frequency for CortexA35
    Hello, For a CortexA35, when reading the system counter clock frequency CNTFRQ_EL0 , I found out that the frequency is 8 MHz. Is this normal? For a target running in GHz? The target is i.MX8QXP...
  • Timer interrupts synchronization in Cortex M4
    Hi, I am working on Cortex M4 based Microcontroller. I have one timer(TIM0) running and when it gets restarted, GPIO pin is set. I have one more timer (TIM1) running separately and it sets another...