• AXI4: Unaligned read transactions
    Hi guys, I'm new to the AXI ecosystem. However, I have one question related to unaligned read transfers. Does AXI4 support unaligned read transfers although er are no strobe lines? If so, which data on...
  • Address decoding in AXI4 interconnect
    Hi, anybody explain how data  is routed in interconnect? As stated in AXI4 spec, only start address issued from master,then how it is done in case of burst transaction? Please Explain how this is done...
  • Problems with  AXI4  write data channel
    Hello:     Suppose there are 2 masters(master0 and master1) and 2 slaves(slave0 and slave1) for AXI4. As AXI4 protocol has removed WID signal for write data channel, When slave0 has received wvaild which...
  • Reason for having decouple write address, data channels in AXI4
    Can someone explain me the advantage of having decouple write address, data channels in AXI4? In AXI3 with data interleaving we can have multiple masters sending data to various clients but in case of...
  • Need info AXI4- AxPROT
    Hello Everyone, Can someone explain the use cases of AxPROT? I am not fully clear on how to use these bits in a system. (So i would like to hear some use cases for this port) Also, Please provide some...