• Memory protection unit - Cortex-M4
    Hi. I am writing back regarding MPU usage. I implemented it into the software in next ways (note, that program is quite simple - only privileged mode, no RTOS): 1. I enabled background region, thus all...
  • Arm DynamIQ Shared Unit
    Hi, I read in the documentation for the Arm DSU that it provides a way-based partitioning of the shared L3 cache. What didn't get clear to me is if a core can still read/write from/to cache ways when...
  • PMU (Performance monitor Unit)
    Hi, How can I use PMU(Performance Monitor Unit) in ARM11 to calculate execution clock cycles of an assembly code. I am using raspberry pi Model B. I am programming it in assembly language (running assembly...
  • ARM Cortex A9 second execution unit
    Dear All, I am trying to understand the full working of execution stage in ARM cortex A9 and the types of instructions that are executed in second execution unit(ALU). Till now i was able to find quite...
  • What’s new with the Memory Protection Unit (MPU) in Cortex-M23 and Cortex-M33?
    ARM Cortex-M23 and Cortex-M33 processors, announced recently at ARM TechCon 2016, both integrate a new Memory Protection Unit (MPU). This optional MPU is based on an updated ARM Protected Memory System...