• CAN Stack Integration for ARM cortex R5F
    Hello All, I am integrating CAN stack, on Spansion S6J3xx series. I have configured Main clock as Input frequency , configured CAN transceiver IC and called CclPowerOnInit() . Now calling CanTransmit...
  • NEON-Advanced SIMD vs. SIMD
    Hello, I’m new to ARM architecture and was looking to get a better understanding of how it works. Most notably, the Cortex-A series and its DSP functionality. When reading through ARM’s webpage, it often...
  • What is the priority between synchronous data abort and FIQ in Cortex-R5F?
    Hi, With Cortex-R5F, we have a case where a read to the L2 memory generates both a synchronous data abort and an FIQ with near-zero delay. We are reading from RAM while the RAM is in test mode and...
  • Lock-Step mode execution on Cortex-R5
    Dear Forum, Could some one please elaborate on , 1. what is Lock-Step Mode ? 2. What is the General HW configuration required ? 3. How to make a program/application executable in Lock-Step mode ? - In...
  • How to test " Lock-Step " is working on Cortex-R5 ?
    Dear Forum, How to test " Lock-Step " is working on Cortex-R5? Please provide inputs on Testing this feature. Thanks, Ravinder Are