• Cortex R4 versus ARM9E
    I have ARM9E very well optimized code. If I run the same piece of code, how much of optimization/performance improvement can be seen on Cortex R4? Does anybody has benchmarking results between ARM9E and...
  • Cortex-R4: Need a explanation for dual-issue restriction
    Hello, The following table is extracted from the Cortex-R4 whitepaper: Could someone help me to explain that question: My concern is that Cortex-R4 can take MOV as first instruction, ADD as second instruction...
  • Very Urgent :VIC in ARM Cortex R4
    Hi all, It was nice experience working with NXP with my favorite S32K1XX series having ARM Cotex M-4 and M-0+. Now i switched to BCM895XX series with ARM Cotex R-4 having VIC for interrupt contolling...
  • Bit scan Instruction ARM cortex R4
    Hi all, I need help for to convert logic in following way: if 1st bit set in (00000000000000000000000000001) i can get 1 f 1st bit set in (00000000000000000000000000100) i can get 2 f 1st bit...
  • Which instruction format does Cortex-R support,encoding A1 orA2?
    I see it support encoding T2 for Thumb-2 instruction set.But which instruction format does Cortex-R support for ARM instruction,encoding A1 orA2?