• Cortex-m0 instructions and core registers immediete values
    Hi, i have just got a cortex-m0(LPC1114) based dev board. I'm reading about the architecture and instructions. My understanding is that it supports most thumb 16-bit instructions and a handful thumb-2...
  • Inline Assembly Parameter example in Definitive guide to Cortex M0/M0+
    I was reading The Definitive Guide to ARMCortexM0/M0+ by Joseph Yiu In Chapter 21, under section 21.4.2 GNU Compiler Collection, there is a example function with inline assembly operation: int my_mul_10...
  • Interruptible-restartable instructions and Others
    Hi, As I have found in: Cortex-M0+ Devices Generic User Guide: 2.1.3. Core registers There is information about instruction behaviour during interrupts: "Interruptible-restartable instructions The interruptible...
  • Processor sometimes ignoring WFI instruction
    Hello everyone, I have a problem with WFI instruction and deep sleep mode. Normally everything work correct, but sometimes processor ignore instruction WFI and continue work. I use ARM Cortex-M0+...
  • Compute the division via shift instruction
    I write the code as following to evaluate the expression n = n / 2 asrs r0, r0, #1 But, I found the GCC will translate the expression n = n / 2 into the following instruction lsrs r1, r0, #31...