• Cortex M4 exception return sequence
    Hi, I think I am just getting confused with this even if (or because of) I read the book and manuals again and again. At exception entry, the processor saves R0-R3, R12, LR, PC and PSR on the stack. Saving...
  • Cortex M7 : Exception return query
    Hi I am working on Cortex M7. I am generating some interrupts and according to it my ISR is being called which I have already installed. After the execution of the ISR the PC is not returning to the instruction...
  • how to return from exception generated by SMC instruction
    Hi, I am experimenting execution level switching on A53. I go from EL3->El2, then call SMC instruction to return to EL3. As soon as SMC instruction is executed, the processor enters EL3 mode and an exception...
  • Of exceptions and aborts..
    Note: This was originally posted on 21st January 2009 at http://forums.arm.com The ARM reference manual specifies sometimes MOV PC,R14 and sometimes SUBS PC,R14, #4 for returning from exceptions. But...
  • How to Generate Exceptions on Cortex M3?
    Hi all, I am trying to generate exceptions like Bus Fault, Usage Fault on ARM Cortex-M3. My code for enable exceptions: void EnableExceptions(void) { UINT32 uReg = SCB->SHCSR; uReg |= 0x00070000;...