• Hypervisor Mode to System Mode in R52 cortex
    Hi Expert, I am using processor with R52 Arm cortex and I need to change hypervisor mode to system mode during run time i.e EL2 to EL1.Is there any instruction to change this? Thanks In Advance...
  • Lock-Step mode execution on Cortex-R5
    Dear Forum, Could some one please elaborate on , 1. what is Lock-Step Mode ? 2. What is the General HW configuration required ? 3. How to make a program/application executable in Lock-Step mode ? - In...
  • How to test " Lock-Step " is working on Cortex-R5 ?
    Dear Forum, How to test " Lock-Step " is working on Cortex-R5? Please provide inputs on Testing this feature. Thanks, Ravinder Are
  • What is the priority between synchronous data abort and FIQ in Cortex-R5F?
    Hi, With Cortex-R5F, we have a case where a read to the L2 memory generates both a synchronous data abort and an FIQ with near-zero delay. We are reading from RAM while the RAM is in test mode and...
  • ARM Cortex-R5 based Lock-step feature demonstration real time application?
    Dear Arm community, is there any real-time application to demonstrate the R5-lock step feature. other than Error injection in to the test register ? Thanks, Ravinder Are