• INVPC Hard fault exception error
    Note: This was originally posted on 16th July 2009 at http://forums.arm.com Using and Arm Cortex M3, the application that is running sometimes will generate a hard fault and deciphering the CFSR register...
  • Forced Hardfault (INVPC) when FreeRTOS on cortext-M33 in non secure mode
    I am trying to run FreeRTOS (10.2) on cortex-M33 in this facing an issue at the end of vRestoreContextOfFirstTask while trying to jump at EXC_RETURN (0xFFFFFFBC) which is leading to an Exception. I am...
  • hardfault error
    Hi! I'm getting hard fault error and I cannot figure out why. Can anybody point me to the right direction? The architecture is Cortex-M4 with stack size of 0x3000. It doesn't seem to be stack overflow...
  • "BX LR" causing INVPC Usage Fault exception
    I have implemented a context switching code. For going back to privileged user mode after setting the return value in SP + 0x18 address, I am using BX LR instruction. But code execution goes to HardFault...
  • MPU is not triggering MemFault or HardFault
    MPU is not triggering MemManage fault. I want to protect a memory region of 64 bytes starting from 0x20000000. I've configured the MPU registers accordingly, but when I write in a protected memory location...