• Precise abort vs synchronous abort in armv7
    I am new to arm architecture. I am reading exception handling from ARM cortex-A series programming guide. I have confusion about the technical difference between precise abort and synchronous abort or...
  • Data Abort on read, although write can be executed without any abort.
    I am a begginer to arm and I have a problem with understanding Data Abort that I get when reading from memory (ATCM) when I read from atcm. next pc jumps to 0x10, so Its Data Abort. However, If I...
  • Data synchronization Barrier and cache.
    Hi, everybody. I have system based on multiprocessors system with ARMv7-A. I need copy table from one point of memory to another. I use for this task DMA. Memory attribute is write-back cacheable. Before...
  • What is the priority between synchronous data abort and FIQ in Cortex-R5F?
    Hi, With Cortex-R5F, we have a case where a read to the L2 memory generates both a synchronous data abort and an FIQ with near-zero delay. We are reading from RAM while the RAM is in test mode and...