• ARMv7 CortexA9 Cache Policy - No allocate ?
    I was wondering if it would be possible to configure cache policy in the page table entry (short descriptor format) in such a way that the cache is used only if the data already exists in the cache? A...
  • ARMv7 performance monitor:how to get L2 cache refill?
    The processor is Samsung's Exynos 4210, ARM Cortex-A9, I want to know whether it supports the L2 cache refill or memory access event?
  • The merit of data cache cleaning
    Hello everyone, my 1st question to the ARM community; please excuse my ignorance.  Fairly recently, I shared OCM (on-chip-memory) on Xilinx Zynq processor (which is dual ARM Cortex A9).  To pass message...
  • ARMv7 architecture
    Can anyone share the ARMv7 architecture document to download ? - Hari.
  • Armv7 Store Buffer
    Hi, Store Buffer holds store operation before it is commited to Cache or Main Memory. So only if the proper store buffer entry is drained, can we get the right data by a load operation. Am I right...