• Speculative execution/loads on Cortex-A5
    Hello. I just found some information about speculative execution and speculative loads/cache line-fills on some ARM processors. Unfortunately I wasn't able to find if any of these present on Cortex-A5...
  • Speculative Branching.
    Hi, I am new to ARM Cortex M3 Microprocessors. Can somebody please explain me the speculative branching in layman terms. Thanks in advance.
  • ARMv7 Branch Prediction Enable
    On "ARM Cortex -A Series Programmer’s Guide" , a piece of code is followed: ... @ Invalidate TLB MCR  p15, 0, r1, c8, c7, 0 @ Branch Prediction Enable MOV r1, #0 MRC p15, 0, r1, c1, c0, 0     @ Read Control...
  • How to disable the branch prediction on armv8
    Hello, I am working with ARMV8 Cortex A72 architecture, i want to know can i turn off branch prediction? and how can i do it? best regards,
  • Cortex A9 (IMX6) : Enabling branch prediction aborts
    Hello, I am using imx6 (cortex- A9) board, and my mmu environment is as follows mmu - enabled L1 data cache - enabled L1 instruction cache - enabled D-side prefetch - enabled L2 cache - disabled Branch...