• about cortex-A72
    hello guys, can you tell me the number of execution units in Cortex-A72 and the number of clock cycles it takes per instruction? Thanks in advance
  • A72 not handling IRQ properly
    I want a register write to happen whenever there is an interrupt at irq pin of core 0 and I have written the code for the same. A72 branches to address 0x18 (V=0 and VE=0) by default whenever there is...
  • DRAM address mapping on a Cortex-A72 ARMv8
    HI Everyone, I need help about DRAM address mapping on a Cortex A-72 especially my question is : given two physical memory addresses how can i know if they are in the same DIMM, Rank and Bank ? is there...
  • How to determine which core is generating the AXI read transaction in a multi core processor?
    I am currently working on Cortex A72 processor. I have generated hex file by compiling the c code file and asm file using Tizen compiler. The code consists of boot code for each core and each core starts...
  • A walk through of the Microarchitectural improvements in Cortex-A72
    In early 2015, ARM announced a suite of IP for Premium Mobile designs, with the ARM® Cortex®-A72 Processor delivering a 3.5x increase in sustained delivered performance over 28nm Cortex-A15 designs from...