• ARM Cortex A9 flush cache
    I'm measuring worst case execution time of an application. I would like to flush L1, L2 (Instruction and Data) cache and then begin my measurements. Is it doable from user mode? Processor: ARM Cortex...
  • System wide cache flush
    Hello, I'm working with i.MX8DX (Dual Core CortexA35 + CortexM4) with the following simplified caching system: My need is to flush a cached memory area to RAM in order to be viewed by the M4 core...
  • Multicore SMP using Linux kernel
    Hi, I am just trying to learn the linux kernel booting process for arm32 Cortex A9 multi core SOC. I had understood the concept of booting in linux, but I am confused about the section where secondary...
  • Cortex-A8: memcpy() into DMA buffer hangs on NEON instructions
    I am cyclically filling the mmap-ed DMA buffer with my data by copying it from "normal" memory in 290 bytes chunks. At the first cycle memcpy always passes OK. At the second cycle it hangs in __memcpy_neon...
  • How can we boot linux kernel in ARM FVP w/ TrustZone?
    Hello, everyone. Let me post a question regarding booting Linux on ARM FVP (with Cortex-A9 MPCore). I'm setting up an experiment which uses TrustZone on ARM FVP. I'm not sure which kernel to run in the...