• Shifted binary produced by arm-none-eabi-objcopy
    Greetings, Im currently trying to fix a strange behavior of objcopy, which sometimes generates invalid output binary image with 0x4 byte shift. I found this issue because this shift was affecting...
  • arm-none-eabi-gcc (bleeding-edge-toolchain) 9.1.0
    I've just created another release of my bleeding-edge-toolchain script, which builds a complete toolchain for ARM microcontrollers. This toolchain uses the most recent versions of all possible components...
  • Binary Semaphore upset by FIQ
    semaphore_take: mov w2, #1 // LOCK value dmb sy // ensure all observers observe data before aquire is attempted ldaxr w1, [x0] // attempt to read and aquire lock cbnz w1, semaphore_take // lock is not...
  • Compute the division via shift instruction
    I write the code as following to evaluate the expression n = n / 2 asrs r0, r0, #1 But, I found the GCC will translate the expression n = n / 2 into the following instruction lsrs r1, r0, #31...
  • MMU initialization for an ARM multicore system
    I am working on an Arria10 SoC which has dual ARM Cortex-A9 MPCore. And I work on bare-metal environment with Intel SoCFPGA’s hardware library(HwLib). On the shared SDRAM, I am planning to have dedicated...