• Explanation of cycles on pre and post index-addressing in case of Load and Store instructions.
    Hello to all, I am working on Cortex-M4 and in order to implement the load and store instructions, I have chosen the pre and post-index addressing and the memory arrangement is little endian. Therefore...
  • What happens when offset value becomes 30 in case of load/store operation
    Hello to all, I was looking at different offset values for both load and store operations. Since due to little endian arrangement, the memory looks something like this to processor: Byte[0x23],Byte...
  • VTOR: offset address configuration
    Core: Cortex-M4F Do I need to configure vector table offset address to 0xnnnn_n 000? In case of 0x3080(Flash region), the program jump to unexpected code. I think it is caused by mismatching between vector...
  • Problem with storing data instruction STR (ASM)
    I'm a really beginner with ARM. I write a very simple program to find the sum of three values Q,R,S and store it in the memory. However it doesn't works. Someone can show me what is my mistake. Thanks...
  • Loading instruction set
    Note: This was originally posted on 7th October 2008 at http://forums.arm.com HI,    I am trying out the Cortex M1 on an altera FPGA. I have an example implementation from the Altera kit which uses ITCM...