• Cortex-M3:Little endian
    Hi All, The cortex M3 in STM32F100xx devices stores in little endian format. Does this mean that even the memory locations which I see in KEIL window are in the little endian format? For eg: 0x20000AFF...
  • MCU Development - Endianness - Big Endian
    For those of ARM's customers, who design microcontrollers, I would like to recommend a Big Endian implementation (or at least an option to select Big Endian). This is due to that I have designs that need...
  • Hard Fault in cortex m4
    Hello All, Good Morning! I am working on Cortex m4. I have read following about hard fault , "Bus Fault: detects memory access errors on instruction fetch, data read/write, interrupt vector fetch, and...
  • Problems with interrupting LDM/STM Cortex M4?
    I am seeing stack corruption running a Cortex M4 that seems to be related to interrupting multicycle instructions. The interrupt occurs during a STMDB sp!, {r4, r5, r6, r7, r8, r9, sl, lr} The ICI bits...
  • stmdb instruction *appears* not to work correctly - Cortex M4 / SAM4L
    I'm struggling to track down a problem here. It appears to be that the stmdb instruction isn't pushing all of the requested registers, and when the corresponding ldmia.w instruction executes, it pops...