• Is there any relationship between BOOT and REMAP in design kit?
    Hi Now I'm trying to digging the design kit. But I cant' find the BOOT relative port or signal and REMAP signal in the design kit. As I know usually BOOT used such as the following picture ...
  • AMBA3 AXI Relationship Between Channels
    In the document AMBA3 AXI (3.2 Relationships between the channels)      Two relationships that must be maintained are:           • read data must always follow the address to which the data relates  ...
  • maximum level of functions than can be called within
    function1 calling function2, function2 calling function3, function3 calling function4 and so on. Maximum stage depends upon Stack Size, right? How to identify Stack Size and if required how to change...
  • What's the relationship between exclusive access and memory cacheable in Cortex A53?
    Hello community and experts, I am doing an experiment on Cortex-A53 which executes some exclusive access instructions such as 'ldaxr'. When I config memory to Normal type+cacheable, 'ldaxr' can execute...
  • Cortex-M pipeline, relationship prefetch and decode stages
    Hi ARM specialists, I have a question about Cortex-M series pipeline behavior. According to the page 15 of "ARM Cortex-M Programming Guide to Memory Barrier Instructions Application Note 321", it is described...