• Present program counter address
    Good day, I want to refresh and (or) update my knowledge on ARMv7. Is it true for ARMv7-M that when CPU starts execute one instruction, PC value has already been updated/is being updated in parallel...
  • Could you explain BCC command to me?
    Hi, I find C code not executing in the desired way. Then I step in assembly code of Tiva-C M4F core. Below is the disassembly code: $C$L5:   nop 0000033a:   280A     CMP             R0, #10 0000033c:...
  • v7M debug architecture questions
    Dear sirs, Regarding v7m debug architecture, I have some questions after reading the v7m architecture document. Q1: There is no mechanism to send instruction to the core for execution in debug state,...
  • arm v7AR debug architecture DCC register access
    Dear sirs, The ARM v7ar manual says that DCC data registers DBGDTRTX and DBGDTRRX have RW attributes from external view. It confuses me why DBGDTRTX can be written from external debugger. what is the...
  • ARMv7-M: Question about syn/asynchronous exception?
    Hi all, I have little experience with bare metal programming at STM32 series and currently studying exception behavior in "ARMv-7m Architecture Reference Manual" . I'm confused about syn/asynchronous...