• How long are the Cortex-M7 pipeline stages?
    Hello experts, recently ARM updated the Cortex-M7 information. I think the biggest topic would be that the pipeline details were opened. The new information says that the integer pipeline is 4 stage and...
  • Parallelism between CPU and FPU
    Hi. I have a question regarding Cortex-M4 processor with floating point unit. Is it somehow possible to do some computation in parallel in CPU (with integers) and FPU (with floats)? Probably not, because...
  • How to detect FPU in Cortex M?
    Cortex-M processors implement the CPUID register, through which it is possible to detect information about the core: part number (e.g. Cortex M7 or M4), revision and patch level (e.g. r1p2), etc. Is...
  • FPU version for Cortex-M microcontrollers
    From a simple google search, I found out that the fpu version for Tiva C Launchpad is fpv4-sp-d16 but which document tells the fpu version of various microcontrollers(tm4c123gh6pm, stm32f407, stm32f446re...
  • Question about the Pipeline, clock cycle and machine cycle in Cortex-M Series.
    Recently I'm learning the implement of ARM cortex m core in order to optimize my software to be more efficient and be easier to predict its execute time. But now I'm confused about the clock cycle, machine...