• Present program counter address
    Good day, I want to refresh and (or) update my knowledge on ARMv7. Is it true for ARMv7-M that when CPU starts execute one instruction, PC value has already been updated/is being updated in parallel...
  • two’s complement
    How to load the two’s complement representation of -1 into Register 3 using one instruction? i am working on ARM7 and NXP processor.
  • BME280 on DesignStart Eval via SPI Shield0
    Hello, I'm trying to connect the DesignStart Eval System to the BME280 Environmental Sensor via SPI. I used the SPI Shield0 Pins (EXP[11 to 14]) to set the connection and activated alternate functions...
  • Is SVC pendable on cortex-m?
    Hey. I read ARMv7-M Arch manual. SHCSR register have SVCALLPENDED bit. So that, It seem SVC is pendable. But, 'Priority escalation' is written, When the group priority of a pending synchronous...
  • Cortex-M RTOS related exceptions and concepts
    Hello, Recently, I came back to digging into RTOS working principles at the lowest level on Cortex-M family processors. I understand the concept of SysTick (or other time base), SVC and PendSV as RTOS...