• [CORTEXM4] Tarmac.log in Palladium simulation
    Hi, I am running the ASIC emulation on the Palladium machine. Right now we are using the ARM RTL (instead of ARM PLI) and in such case there is no tarmac.log. Is there an option to run with ARM...
  • ARM cortexM4 improve rearranging an unsinged int variable
    I'm just start learning ARM cortex-M4, that have advanced funcition like DSP instruction,FPU, ... uint32_t my_rearrange(uint32_t value){ uint32_t value_high = (value & 0xffff0000)>>16; uint32_t...
  • cmsis NVIC question.
    Hello, Everybody. I have several questions. 1. Please See the NVIC_Type structure. I don't understand about why ISER,ICER,ISPR and ICPR use size of array 1( I think It can use just __IO uint32_t ISER;...
  • NVIC and ARM asm
    Cannot configure interupts of TIM6 on stm32f103 board Does my NVIC configuration wrong? Code: @ stm32f103 timer & interrupt test by laper_s (from 2019-02-02) .thumb .cpu cortex-m3 .syntax unified...
  • Is this right? (NVIC Interrupts)
    Hello everyone, i'm working on NVIC, i need enable the TIMER2 IRQ, but without CMSIS HAL, just native C code, so i have got this: #include "NVICDriver.h" #include <stdint.h> #include <string.h>...