• Cortex-M interrupts queue
    Hello, I want to ask how interrupts queue is implemented in ARM Cortex-M processors. For example while one ISR is processing if many other interrupts will arrive, how processor will handle this interrupts...
  • Cortex M4 vs Cortex A9
    Note: This was originally posted on 11th October 2012 at http://forums.arm.com What are the main difference between these two processors
  • Cortex-M instruction set test?
    Does there exist an instruction set test for the Cortex-M series?  This might also be known as a CPU instruction test, or by other terms...  Such test would be used to diagnose potentially faulty CPU...
  • How to detect FPU in Cortex M?
    Cortex-M processors implement the CPUID register, through which it is possible to detect information about the core: part number (e.g. Cortex M7 or M4), revision and patch level (e.g. r1p2), etc. Is...
  • FPU version for Cortex-M microcontrollers
    From a simple google search, I found out that the fpu version for Tiva C Launchpad is fpv4-sp-d16 but which document tells the fpu version of various microcontrollers(tm4c123gh6pm, stm32f407, stm32f446re...