• [CM4] Best general way to handle a hardfault/lockup
    Over the past few months I've been doing a lot of work on a Kinetis K24 processor, which is a Cortex-M4, running the MQXLITE RTOS. It also has a couple other SDKs built in and a surprising level of complexity...
  • Debug probes interoperability
    Hi, Are CMSIS-DAP debug probes compatible through different vendors (who are chip manufacturers too)? Are RDI/JLINK debug probes compatible through different vendors (who are chip manufacturers...
  • how to handle lockup state in M33
    Dear Developers, I am trying to run FreeRTOS on MPS2 plus board for CM33. but xPortStartScheduler fails and gets stuck at SecureHandler(Lockup addr PC: 0xEFFFFFFE). It fails when trying to start...
  • Why use Cortex-M7 dual-redundant core?
    Cortex-M7 has an parameter named "LOCKSTEP" which specifies whether the implementation is a dual-redundant core and uses lock-step. My question is: why do I need to implement the dual-redundant core...
  • Cortex-M7 load instruction latency and pairing
    Hello, What is the latency for the LDR instruction when the result is used for integer arithmetic operations (for example DSP MAC instructions)? Also, can 64-bit loads (LDRD) be paired with another instruction...