• When an exception is taken into account
    Hi Related to ARMv7-M architecture: I am searching through all infocenter documents but still cannot find anything and answer this question: "When an exception is taken into account?" I mean, are...
  • ARMv7-M: Question about syn/asynchronous exception?
    Hi all, I have little experience with bare metal programming at STM32 series and currently studying exception behavior in "ARMv-7m Architecture Reference Manual" . I'm confused about syn/asynchronous...
  • How to Generate Exceptions on Cortex M3?
    Hi all, I am trying to generate exceptions like Bus Fault, Usage Fault on ARM Cortex-M3. My code for enable exceptions: void EnableExceptions(void) { UINT32 uReg = SCB->SHCSR; uReg |= 0x00070000;...
  • When will be the Release of "The Definitive Guide to Cortex M7" ??
    Hi Sir, may be the title of this question looks fun, but i am eagerly waiting for your next book "The Definitive Guide to Cortex M7" are you working on this book?? When could i Expect this book Thanks...
  • DMB, DSB, ISB on Cortex M3,M4,M7 Single Core parts
    I have been reading through the ARM documentation on memory and instruction barriers. I have read that the single core ARMv7-M parts do not reorder instructions, as such the DSB and ISB are not needed...