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    Hi all, Recently I encountered a problem. During CA53 bootup stage, PC will transfer a small executable program to the target platform via USB and then give the control to that program, which will first...
  • Cortex-A53 processor instruction cycles
    hi , I want to know the cycle information ,latencies of each instruction(secially vector instructions in A32 and A64) in coretex A53 architecture. It seems there is no document available which specifies...
  • ARMv8.1-A:How to disable the hardware management of the Access flag
    Hi ARM expert, I need do something when dealing with the access flag fault. But in ARMv8.1-A, there is an option of hardware management of the Access flag. Can anybody tell me how to set the option...
  • ARMv8.1-A: Access Flag managed by Hardware
    Hi ! I am currently using the Access Flag with software management, and I recently read about the v8.1 evolution with hardware management. From the reference manual: When the hardware management of...
  • sp register minus fault in stp instruction
    summary: sp (0000000012108d90) - 48 = 0x 4 000000012108d60 when exec stp instruction (62 bit become 1). Could anyone help to explain why this happen? Thanks. the details in below: We get a level...