• AXI FIXED burst ; Wr/Rd narrow transactions.
    1. I'm examining AXI burst of FIXED type. 2. Data bus width is of 128bit. 3. case scenario WRITE :     awlen    = 2 (3 write transfers)     awsize  = 2 (32bit per each transfer)     awburst = 0 (FIXED...
  • Question about AXI Wrapping burst
    There is a statement ' For wrapping burst, the length of the burst must be 2,4,8 or 16 transfers. ' in AXI Addressing option. I cannot understand that why must be 2,4,8 or 16 transfers? Is there some...
  • AMBA AXI :Unaligned "INCR" data transfer
    Hi,     i am confusing in the following point ,with an example....    if      Start_Address = 23      Number_Bytes = 8      Burst_Length   = 8      data_Bus_Byte =4 1.How many data transfer required to...
  • Can AXI data channel drop a burst?
    Hello,        I have a question regarding the AXI protocol, which I can seem to find the answer from the spec.        On the AXI read bus.        If the master send the slave 10 read burst commands, does...
  • How AXI addressing works for fixed burst with unaligned address.
    Please consider following example: Data bus width = 32 bit burst size = 4 bytes Burst length = 3 Address = 0x02 burst type = FIXED. Write strobes are high from byte address 0x02 to the last byte in this...