• AXI narrow transfers
    I would appreciate assistance on the following: Suppose a bus master with 128bit data width. This master access a 64bit slave via AXI matrix as follows: awaddr = 0x4000_909F awsize = 0x0 (8bit write)...
  • Difference between FIXED and INCR burst in AXI?
    For any burst transfer Master has to pass only first address, for the consecutive transfer address calculation is taken care by Slave. So i want to know what is the basic difference in FIXED and INCR...
  • Legal transactions for AXI FIXED mode
    Hello, I am currently using AXI with burst type of FIXED for writing into a fifo. its data bus width is 32 - bits. 1. So i wanted to know whether AWSIZE of 64-bits and greater are legal or no. If...
  • How AXI addressing works for fixed burst with unaligned address.
    Please consider following example: Data bus width = 32 bit burst size = 4 bytes Burst length = 3 Address = 0x02 burst type = FIXED. Write strobes are high from byte address 0x02 to the last byte in this...
  • Question about AXI Wrapping burst
    There is a statement ' For wrapping burst, the length of the burst must be 2,4,8 or 16 transfers. ' in AXI Addressing option. I cannot understand that why must be 2,4,8 or 16 transfers? Is there some...