• UPREDICTABLE instructions
    Any idea about instructions marked as UNPREDICTABLE: can it then be UNDEFINED? In other words: UNDEFINED REQUIRES the instruction to cause UND-exception, but MAY UNPREDICTABLE do that, or does it...
  • What does this instruction do?
    In the ARMv7-A/R ARM Issue C I found two instructions with odd encoding: PUSH and POP, encoding A2. What's the Rt's role? I guess Rt and 'registers'-bitlist needs to match? Encoding A2 ARMv4*, ARMv5T...
  • What are hints?
    What does it mean that an instruction is a hint instruction, like NOP, YIELD and WFE? I haven't found any explanations in ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition, Issue C. ...
  • Return address from FIQ_Handler. Do we come back to the next instruction?
    Is it MOVS pc, r14 or SUBS pc, r14, #4 This is written in the ARMDEN0013D. but in the table it says next instruction whereas the SUBS pc, r14, #4 means the instruction which was interrupted.
  • Instruction format in documentation ARM-v7-A
    Hi. This is the first time to ask questions in this forum. Hope this is the right place to reach you and get help. I refer to the documentation ARMv7-A and ARMv7-R edition I don't understand the brackets...