• TCM and ARM1136
    Note: This was originally posted on 13th January 2009 at http://forums.arm.com Hi, I am trying to use DTCM to see if I can improve performance of my program on ARM1136. I wrote a test program that just...
  • ARMv6 performance monitor: Can I record the instruction which caused the data cache miss
    Hi, I'm new to community. I am recently working on cache performance evaluation of a software on arm ( which I did not know much about before) and aiming  to record all the instructions causing a data...
  • cache invalidation
    Hi, If the Cache line valid bit in implemented in the Memory along with the Tag RAM, during the initial power-up and reset, cache-invalidation requires each bit of the cache line to be explicitly written...
  • ARM1136 - Not Jumping to ISR problem
    Note: This was originally posted on 6th January 2009 at http://forums.arm.com Hi, I am working on ARM1136JF-S Core. I need to implement handling of the interrupts (GPT interrupt) in u-boot bootloader...
  • Best Performance processor in ARM1136 or ARM926?
    Note: This was originally posted on 2nd April 2009 at http://forums.arm.com Hi Friends,            Can any one tell me, which is best processor in ARM1136jf-s or ARM926ej-s (performance wise). Regards...