• LDREX/STREX on the M3,M4,M7
    Doing some research of the LDREX and STREX it appears that the exclusivity address range for these instructions on the M3,M4,M7 is the entire memory space. Hence you can only use the LDREX/STREX with...
  • How to test atomic access implemented with Load Store Exclusive Assembly (LDREX / STREX)
    Hi there, i have several inline assembly functions wrapped in C. They implement atomic / read-modfy-write style Compare And Swap Increment Decrement Lock Semaphore Creating a good...
  • Cortex-M3 or -M4: Which is better?
    Hi, I need some clarification about which one is better either Cortex-M3 or -M4. Which one is present trending and which one having good future. Thanks in advance.
  • What's the difference between LDAXR and LDREX
    Hi experts: In armv8 specification, I have found two types of exclusive access instructions: LDAXR/STLXR and LDREX/STREX. I have some questions about these instructions: (1) What's the difference...