• Interrupt on Out-of-Order pipeline of Cortex-A15
    Hi, I would like to know the interrupt behavior on Out-of-Order pipeline on Cortex-A15. When some instruction is executing on Out-of-Order pipeline, one interrupt is happens. In this case, its interrupt...
  • behavior of executing instructions on the out-of-order pipeline of Cortex-A15
    Hi, I have one question regarding the interrupt of A15 core. Please see the below picture. I would like to know which area existing instructions are discarded when the interrupt happens. When an interrupt...
  • What's the cortex-A7 pipeline's in-order and cortex-A15 pipeline's out-of-order mean?
    What's the cortex-A7 pipeline's in-order and cortex-A15 pipeline's out-of-order mean? In ARM's white paper(about the cortex-A7 and cortex-A15) says as follow: I want ask the in-order and out-of-order...
  • Exception / Interrupt for Cortex-A15
    Hi, I would like to know whether my understanding is right or not regarding to the interrupt (exception). When an interrupt is issued, the interrupt is executed at once without the completeion of the...
  • Cortex A15 SCU
    Hi, I find no introduction about SCU registers of A15 in the TRM. So, can software control SCU? Especially is SCU needed to be enabled by software? Thanks&Regards.