• Intercore interrupts on a53 between EL1 and EL3
    We are working on Xilinx MPSOC which has 4 A53 cores, We are trying to run Linux(EL1) on 3 cores and Freertos(EL3) on 4th core. When software generated interrupts are raised from Linux , Freertos is not...
  • how to return from exception generated by SMC instruction
    Hi, I am experimenting execution level switching on A53. I go from EL3->El2, then call SMC instruction to return to EL3. As soon as SMC instruction is executed, the processor enters EL3 mode and an exception...
  • Cannot access EL1 resources from EL3 or secure world on armv8.
    The working secerio is that I'm testing OP-TEE on a Hikey board(Cortex-A53, armv8), and they use arm-trusted-firmware(see https://github.com/linaro-swg/arm-trusted-firmware ) to be the monitor running...
  • SMC call on ARM64
    Hi I have basic question over SMC call in ARM64 architecture. I am working on 8 core system, say when core-0 calls SMC and this is in progress , at same time can core-1 do smc call and enter into...
  • SMC flow on ARMv8
    Hi everyone, Wherever I go on internet, the thing I read is that when SMC instruction is executed an exception is generated, it takes you to the highest exception level (EL3) where secure monitor is...