• How to test " Lock-Step " is working on Cortex-R5 ?
    Dear Forum, How to test " Lock-Step " is working on Cortex-R5? Please provide inputs on Testing this feature. Thanks, Ravinder Are
  • How does memory work in cortex M3?
    Hi Now I'm trying to understand about memories in the Cortex design kit. I came across memory address map of cortex M3 when I googling as the below. In the image, left one is an AHB memory map...
  • code is not working for optimization setting O2 and O3 for Arch64bit Cortex-A53 process
    I come across strange issue with Optimization setting O2 and O3 option my code will not work due to PC corruption, with O1 and O0 code woke fine, our target procesor is Arch64bit Cortex-A53. how to fix...
  • DIscussion, Cortex-a53 support pthread with 4 cores work together
    I am ruining Pthread application on cortex-a53 which has 4 cores. And I also run the same application on the server with 8 arm cores to make a comparison. A problem is there is bare performance improvement...
  • stmdb instruction *appears* not to work correctly - Cortex M4 / SAM4L
    I'm struggling to track down a problem here. It appears to be that the stmdb instruction isn't pushing all of the requested registers, and when the corresponding ldmia.w instruction executes, it pops...