• How many clock cycles do SVC/PUSH/POP/SRS/RFE insturctions take to execute on Cortex-A8 processor?
    I'm trying to count the cycle timing of my program in hand. I read the ARM Cortex-A8 R3P1 Technical Reference Manual: Chapter 16. Instruction Cycle Timing, but I couldn't find the cycle timings of SVC...
  • why does LDR takes two cycle to be executed
    Hello everyone, I am currently working on a cortex-M0 microprocessor(LPC1114). I have looked through all the possible instruction descriptions but I did not find anyone of them explaining why some instructions...
  • How many cycles requires the instruction QBNE?
    QBNE (Quick branch not equal) Using the PRU in the Beaglebone black (AM335x 1GHz ARM® Cortex-A8) I am asking how many cycles requires the instruction QBNE? qbeq myLabel, r1, 0 I suppose two if the comparison...
  • Event counters take differing number of cycles
    We have some code that sets up various event counters and reads them.  We bracket this code with reads of the cycle counter.  We have noticed that depending on what event counter we are configuring, we...
  • Understanding of the clock cycle activity for LPC1114
    Hello, I am now working with the LPC1114 which utilizes the ARM CORTEX M0 architecture. I have one question about the instruction set summary of the ARMv6M Thumb instruction set. I want to know what...