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    Dear Experts I am working on a target that contains quad A53 cores operating at 1GHz. The operating system idle loop contains WFI inline assembly instruction. I know that the Core Clock halts during...
  • ARMv8 PMU access
    Hey guys, I'm running a sw in a multicore ARMv8 system and I'd like to know a bit more about the PMU component. There is a PMU per CPU, right? Is it possible from one CPU to access the other CPU...
  • How to configure Cortex-A57 PMU
    I asked this question in a different community space but it seemed like this is a more appropriate home. I'm trying to configure the performance counters for the Cortex-A57 and I'm very confused. The...
  • Setting PC for and waking up secondary cores from the primary core
    Given a multiprocessor system, how are the PC values of secondary cores set from the primary core? I've read lots of threads stating it can be done but without any details. I could not find anything in...
  • android kernel for quad core ARM cortex A53
    Please give me source code for android kernel for quad core ARM A53 processor