• How to debug cause of Hard Fault on CortexM0?
    Dear everyone, I am developing an MCU system by using the DesignStart Pro, CortexM0 version. I program the DesignStart Pro RTL into Altera FPGA, and I use Keil C for software building. The system...
  • INVPC Hard fault exception error
    Note: This was originally posted on 16th July 2009 at http://forums.arm.com Using and Arm Cortex M3, the application that is running sometimes will generate a hard fault and deciphering the CFSR register...
  • Hard Faults and MemManage Faults in Cortex m3/m4
    I wrote a simple program, where I am writing to an illegal memory location. Writing in an illegal Memory location generates a MemManage fault. And if MemManage is not enabled, HardFault in generated....
  • Safe exit from HARD FAULT on CortexM0
    Hi All, I am developing on a CM0+ with functional safety support. The safety manual requires to test some features before activating safety functions; many of these are straightforward while others...
  • Hard Fault on Cortex M0
    I am using a nRF51422 from Nordic Semiconductor with has an ARM Cortex M0 CPU. While trying to use their Bluetooth Mesh SDK I get a Hard Fault. I am trying to debug the example code to figure out...