• Privilege mode on CM0+
    CM0+ reference manual said the below. Unprivileged The software:      - xxxx      - xxxx      - Might have restricted access to memory or peripherals. Here, I don't know what is meaning the last line...
  • Cortex-M0+ privileged/unprivileged extensions
    Hi all, According with ARMv6-M architecture reference manual, it supports two operation modes, handler mode and thread mode. - "execution in handler mode is always privileged." - "execution in...
  • MPU
    Hi Using STM32f4 Board, I am enabling MPU in between any code (simple program) always causing memory management fault on debugging fault that ( IACCVIOL) bit is set, It means Attempting...
  • Cortex-M MPU limitations
    Hi All, The title may seem a bit negative, just from my personal point of view. What is the main reason of the two requirements of setting up MPU, namely size and start addresses of MPU regions. First...
  • Differences between Privilege Modes and Non-Privilege Mode ?
    Hi everyone , I'm currently using a Cortex-A9 processor (NXP Freescale i.MX6S). My project is to develop a simple OS, but I met a problem: When I am trying to control some peripherals (such as...