• Boot sequence and secure boot
    Hi, I'm using SAM L11 which is based on Cortex-M23. I have difficulties understanding the boot sequence and have the following questions. 1. The software bootloader is stored in the BOOT region (B_S...
  • Cortex M4 exception return sequence
    Hi, I think I am just getting confused with this even if (or because of) I read the book and manuals again and again. At exception entry, the processor saves R0-R3, R12, LR, PC and PSR on the stack. Saving...
  • How do I start with simple example for study about boot rom and boot sequence?
    Hi. How do I start with simple example for study about boot rom and boot sequence? I'd like to make a simple architecture, but first of all, I have to make a L1 boot and L2 Boot code as I know. ...
  • Reduce ARM CM0+ scatter initialization during boot?
    We are using ARM CM0+ in our embedded SoC design and I noticed that boot takes a long time. Specifically, I saw that it took ~18K cycles after the unreset before we executed an instruction that I recognize...
  • Is there a built-in ARM assembly instruction for the following problem?
    Is there an ARM assembly instruction for the following problem of converting between string to number, number to string, and number to number? String -> Number Number -> String Number -> Number...