• What is the PMU counter resolution when the processor switches between 64-bit and 32-bit mode?
    Hi experts, The PMU counter value is mentioned as 64 bit in ARMV8 manual. What is the PMU counter resolution when the processor switches between 64 bit and 32 bit mode
  • ARM v8 A64 instruction 32-bit variant usage
    Dear sirs, I'm studying ARM v8a architecture recently. I found that almost each A64 data processing instruction has a 32-bit variant using sf to encode it. My question is as follows. 1. who is responsible...
  • Porting to Arm 64-bit
    This white paper is an introduction to porting existing code to the A64 instruction set supported by Armv8-A processors like the Cortex-A53 and Cortex-A57 from Arm. It will also be useful for those...
  • ARMv8-A: Is an ISB instruction required after writing to the CPSR register in AARCH32 state?
    For example, write cpsr as following code snippets: mov r1, sp movw lr, #0x393 movt lr, #0 msr cpsr_cxsf, lr do_irq: ... Is an ISB instruction required after " msr cpsr_cxsf, lr "? Thank...
  • Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32?
    I was reading the ARM architecture reference manual... and thought Is it possible to implement EL3 AArch64 and change it later to EL3 AArch32? How to change is... If I start on cold reset, it will start...