• Please explain non-temporal example in programmer's guide
    In ARM Cortex-A Series Programmer’s Guide for ARMv8-A: 13.2.4. Non-temporal load and store pair it talks about a relaxation of the memory ordering requirements and then gives the example      LDR    ...
  • CPI for ARM V-7
    Hi All, I could understand the difference in ARM V-7 processor differences between A/R/M. But does the clock cycle per instruction value for the various series of processors (A/R/M) remains the same or...
  • How to make ARM core hung
    Hello All/ARM, I would like to know if there is any way of process to hang a specific core for certain duration of time? Either from Kernel/User space? Also i have trying to understand if that is possible...
  • How to Design secure boot on ARM based SoC?
    I have started working on TI's ARM based Soc and wanted to know how to design secure boot ? Is implementation of Secure boot is part of first stage boot-loader Rom boot loader ? I have gone through the...
  • How to bring secondary CPU1 on ARM v7
    Hi, I am trying to bring up CPU1 on ARM v7 architecture  (assume CPU0 already bring up & set c-environment) using below code, but it hitting with error: "stack smashing detected" ldr  sp, =cpu1_stack...