• Question about a code snippet on ARM, Thumb state change
    Hi, I find the following code snippet online on ARM state change. Although that whole material looks solid, the second line in the blue code below is puzzling. add R1,PC,#1 ;Load address of SUB_BRANCH...
  • Cortex-M4 Suspend/Resume Interrupts
    Hi together, im am working on a project managing high IRQ/ISR loads. (NXP S32K14x) On some critical sections i have to suspend global interrupt mechanism (cpsid i) and resume afterwards. Is it necessary...
  • State of link register on an interrupt from Thumb (ARM7TDMI).
    Hi, If an interrupt occurs when in Thumb state, does the LSB of the link register become 1. Thanks, Revanth
  • How to compare ACPI states (Sx, Cx) with ARM Cortex-A processor states (Standby, Retention, Power Down, Dormant Mode, Hotplug, Stop, Deep Sleep) ?
    Hello, I'm a student and I'm interested in how to compare ACPI Sleep States (Sx) and processor power states (Cx) with ARM Cortex-A states e.g. Standby, Retention, Power Down, Dormant Mode, Hotplug, Stop...
  • How many states for an ARM Cortex A8?
    Hi, When I read about Thumb2 instructions, I have such a question: How many states for a Coretx A8? I know it has ARM and Thumb states. Thumb2 instruction is belong to Thumb state? Then does A8 have a...