• ARMv8 backwards compatibility with ARMv7
    Hi there, I have been going through a lot of ARMv8 documents, and I have a very basic question: -Can I take a Linux Kernel, compiled for a ARMv7 device, and run it on an ARMv8 device in Aarch32 execution...
  • Address decoding in AXI4 interconnect
    Hi, anybody explain how data  is routed in interconnect? As stated in AXI4 spec, only start address issued from master,then how it is done in case of burst transaction? Please Explain how this is done...
  • Does AMBA 4 ACE backward compatible with AXI3?
    Does AMBA 4 ACE backward compatible with AXI3? Suppose that I don't need all the coherency features
  • Cortex A53 Out of Order?
    Hi all, Recently I encountered a problem. During CA53 bootup stage, PC will transfer a small executable program to the target platform via USB and then give the control to that program, which will first...
  • Cortex-A53 processor instruction cycles
    hi , I want to know the cycle information ,latencies of each instruction(secially vector instructions in A32 and A64) in coretex A53 architecture. It seems there is no document available which specifies...