• SMMU related question.
    when reading  ARM® System Memory Management Unit Architecture Specification, I noticed that there is a saying in about chapter 5, the last section named <cache maintenance operations>.           In SMMUv2...
  • is it possible to flush/invalidate cache from user space for AARCH32
    Hi, When AARCH64 works at AARCH32 mode, is it possible to flush/invalidate cache from user space? i know AARCH64 can do that, but is it capable for AARCH32? i am working on a user space driver and i need...
  • Hello, my question is about watchpoint.
    When I set a on-chip breakpoint with MMU enabled, virtual address is 0xcc000000 ( real physical address is 0xbb000000)for example. Once the MMU map changed, when the breakpoint would be hit, new virtual...
  • Cortex-M CMSIS Driver groups and related question
    I want to start on using CMSIS and as well as also possibly implement my own drivers with CMSIS interface.I don't have a clear pic in my head of the complete layout of CMSIS, what goes into it. Specifically...
  • Getting started with Arm Microcontroller Resources
    Chinese Version 1. Overview For a beginner new to Arm-based microcontrollers, it can sometimes be a little difficult knowing where exactly to start finding all the useful information that will help...