• ACE - ReadNoSnoop transaction
    In ACE Specifications - ARM IHI 0022E, in ReadNoSnoop transactions how is the following other state of cacheline given on page number C4-197 transaction permitted : Start State  - ShareClean RRESP[3]...
  • ReadClean transaction (ACE protocol)
    Hello everyone, Can any one explain me why there is a case where a start state in Unique Dirty leads to a final state in Unique Dirty for a readClean transaction in ACE protocol. This transaction requires...
  • MakeUnique Transaction (ACE protocol)
    Hi., As we know that there is a MakeUnique transaction in ace protocol, can anyone tell me how we can initiate this transaction..? I mean what is the respective signal in AXI4/ACE that allows us to set...
  • Barrier Transactions - ACE Protocol
    Hi all., Can anyone please, help me out in understanding this Barrier Transactions concept in ace protocol. I find little difficult and confusing in understanding about domain boundary, bi-section boundary...
  • AXI4: Wider transactions than BUS width allowed?
    Hi AXI-experts, Does AX4 support burst sizes larger than the bus width? Narrow transactions are allowed, but do wider transactions also work? Best regards, Robert