• Cortex-A7 initialization code & TrustZone/ Secure Boot
    Hi, I just got a raspberry pi 2 and I'd like to play with Trustzone. People on the Raspberry forum http://www.raspberrypi.org/forums/viewtopic.php?p=697474#p697474 explained me how to get my hand on the...
  • In cortex-A7 it has 8 stages pipeline, so PC's value is current program address add how many?
    In cortex-A7 it has 8 stages pipeline, so PC's value is current program address add how many bytes?
  • Where can I find the cortex-A7 related 8 stages pipeline docments?
    Where can I find the cortex-A7 related 8 stages pipeline docments? I have found some docments about this but all are too brief, so I want ask where can I find the detailed docments?
  • ACTLR[1] question in Cortex-A serias SOC
    hi, experts: I found ACTLR register definition is different between Cortex-A7 and Cortex-A9. I have some questions about out cache concept in Cortex-A7. 1. Some program disable outer cache by setting...
  • Basic cortex A9 architecture question (memory area division)
    Hello all, I have a client who has the following requirement. He uses an Cortex A9 (dual core) based SoC chip . The system has two Flash ROMs - Flash ROM 0 and Flash ROM 1. Each of these flash roms has...