• ARMv7 Vs ARMv8 AArch32 Performance improvement
    Hello, I'm using an ARMv8 processor in 32 bit ARMv7 compatibility mode. I would like to know if there is any difference (performance gain) in ARMv8 running in AArch32 mode Vs running the same on an...
  • Development with ARMv8a debug (and watchpoint) registers.
    Hello folks, I have two simple questions related to the debug exceptions on ARMv8. I expect the debug related registers such as DBGWCR, DBGWVR, DBGBCR and DBGBVR to be common for all processor cores...
  • What does PMCEID0_EL0 determine for the the PMU? Performance monitor config
    The TRM for the a-57 states that PMCEID0_EL0: Defines which common architectural and common micro-architectural feature events are implemented. PMCEID1_EL0 is a continuation of this list. If a bit position...
  • generic timer difference armv8a and cortex-a53
    ARMv8-A Architecture Reference Manual written An EL1 physical timer. An EL2 physical timer. An EL3 physical timer. A virtual timer. but, Cortea-A53 Technical Reference Manual written A Non-secure EL1...